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FS50SM-3
High-Speed Switching Use Nch Power MOS FET
REJ03G1422-0200 (Previous: MEJ02G0120-0101) Rev.2.00 Aug 07, 2006
Features
* * * * * Drive voltage : 10 V VDSS : 150 V rDS(ON) (max) : 31 m ID : 50 A Integrated Fast Recovery Diode (TYP.) : 130 ns
Outline
RENESAS Package code: PRSS0004ZB-A (Package name: TO-3P)
4 2, 4
1 1
1. 2. 3. 4.
Gate Drain Source Drain
2
3 3
Applications
Motor control, Lamp control, Solenoid control, DC-DC converters, etc.
Maximum Ratings
(Tc = 25C)
Parameter Drain-source voltage Gate-source voltage Drain current Drain current (Pulsed) Avalanche drain current (Pulsed) Source current Source current (Pulsed) Maximum power dissipation Channel temperature Storage temperature Mass Symbol VDSS VGSS ID IDM IDA IS ISM PD Tch Tstg -- Ratings 150 20 50 200 50 50 200 150 - 55 to +150 - 55 to +150 4.8 Unit V V A A A A A W C C g Conditions VGS = 0 V VDS = 0 V
L = 100 H
Typical value
Rev.2.00
Aug 07, 2006
page 1 of 6
FS50SM-3
Electrical Characteristics
(Tch = 25C)
Parameter Drain-source breakdown voltage Gate-source leakage current Drain-source leakage current Gate-source threshold voltage Drain-source on-state resistance Drain-source on-state voltage Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Source-drain voltage Thermal resistance Reverse recovery time Symbol V(BR)DSS IGSS IDSS VGS(th) rDS(ON) VDS(ON) | yfs | Ciss Coss Crss td(on) tr td(off) tf VSD Rth(ch-c) trr Min 150 -- -- 2.0 -- -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- 3.0 24 0.600 55 6540 860 360 95 155 380 180 1.0 -- 130 Max -- 0.1 0.1 4.0 31 0.775 -- -- -- -- -- -- -- -- 1.5 0.83 -- Unit V A mA V m V S pF pF pF ns ns ns ns V C/W ns Test Conditions ID = 1 mA, VGS = 0 V VGS = 20 V, VDS = 0 V VDS = 150 V, VGS = 0 V ID = 1 mA, VDS = 10 V ID = 25 A, VGS = 10 V ID = 25 A, VGS = 10 V ID = 25 A, VDS = 10 V VDS = 10 V, VGS = 0 V, f = 1MHz VDD = 80 V, ID = 25 A, VGS = 10 V, RGEN = RGS = 50 IS = 25 A, VGS = 0 V Channel to case IS = 50 A, dis/dt = - 100 A/s
Rev.2.00
Aug 07, 2006
page 2 of 6
FS50SM-3
Performance Curves
Power Dissipation Derating Curve
200 3 2
Maximum Safe Operating Area
tw =
Power Dissipation PD (W)
Drain Current ID (A)
160
120
102 7 5 3 2 101 7 5 3 2
10
0
10
s
s
DC
80
40
0
0
50
100
150
200
100 Tc = 25C 7 Single Pulse 5 30 10 2 3 5 7 101 2 3 5 7 102 2 3 5 7 103
Case Temperature Tc (C)
Drain-Source Voltage VDS (V)
Output Characteristics (Typical)
100
VGS = 20V 10V 8V 7V 6V
Output Characteristics (Typical)
50
VGS = 20V 10V 7V 6V
Tc = 25C Pulse Test
5V
Drain Current ID (A)
60
Drain Current ID (A)
80
40
30
40
5V PD = 150W
20
20
10
4V
Tc = 25C Pulse Test
0 0 1.0 2.0 3.0 4.0 5.0 0 0 0.4 0.8 1.2 1.6
2.0
Drain-Source Voltage VDS (V)
Drain-Source Voltage VDS (V)
Drain-Source On-State Voltage VDS(ON) (V)
Drain-Source On-State Resistance rDS(ON) (m)
On-State Voltage vs. Gate-Source Voltage (Typical)
2.0
ID = 100A
On-State Resistance vs. Drain Current (Typical)
40
Tc = 25C Pulse Test
32
1.6
80A
1.2
50A
24
VGS = 10V 20V
0.8
16
0.4
Tc = 25C Pulse Test
20A
8 0
0
0
4
8
12
16
20
3 5 7 100 2 3 5 7 101 2 3 5 7 102 2 3
Gate-Source Voltage VGS (V)
Drain Current ID (A)
Rev.2.00
Aug 07, 2006
page 3 of 6
FS50SM-3
Forward Transfer Admittance vs. Drain Current (Typical)
Forward Transfer Admittance | yfs | (S)
102 7 5 4 3 2 101 7 5 4 3 2 100 0 10 2 3 4 5 7 101 2 3 4 5 7 102
Transfer Characteristics (Typical)
100
Drain Current ID (A)
80
Tc = 25C VDS = 10V Pulse Test
VDS = 10V Pulse Test
60
TC = 25C 75C 125C
40
20
0
0
4
8
12
16
20
Gate-Source Voltage VGS (V) Capacitance vs. Drain-Source Voltage (Typical)
2 104 7 5 3 2 103 7 5 3 2 102 7 5 3 2
Ciss
Drain Current ID (A)
Switching Characteristics (Typical)
103 7 5 4 3 2 102 7 5 4 3 2 101 0 10
td(off)
Capacitance C (pF)
Switching Time (ns)
tf tr td(on)
Coss Crss
Tch = 25C f = 1MHz VGS = 0V
3 5 7100 2 3 5 7 101 2 3 5 7 102 2 3
Tch = 25C VDD = 80V VGS = 10V RGEN = RGS = 50
2 3 4 5 7 101
2 3 4 5 7 102
Drain-Source Voltage VDS (V) Gate-Source Voltage vs. Gate Charge (Typical)
20 100
Drain Current ID (A) Source-Drain Diode Forward Characteristics (Typical)
VGS = 0V Pulse Test
Gate-Source Voltage VGS (V)
Tch = 25C ID = 50A
16
VDS = 50V
Source Current IS (A)
80
Tc = 125C
12
80V 100V
60
75C 25C
8
40
4
20
0
0
40
80
120
160
200
0
0
0.4
0.8
1.2
1.6
2.0
Gate Charge Qg (nC)
Source-Drain Voltage VSD (V)
Rev.2.00
Aug 07, 2006
page 4 of 6
FS50SM-3
On-State Resistance vs. Channel Temperature (Typical)
101 7 VGS = 10V 5 ID = 25A 4 Pulse Test 3 2 100 7 5 4 3 2 10-1 -50 0 50 100 150
Drain-Source On-State Resistance rDS(ON) (25C)
Gate-Source Threshold Voltage VGS(th) (V)
Drain-Source On-State Resistance rDS(ON) (tC)
Threshold Voltage vs. Channel Temperature (Typical)
5.0
VDS = 10V ID = 1mA
4.0
3.0
2.0
1.0
0
-50
0
50
100
150
Channel Temperature Tch (C)
Channel Temperature Tch (C)
Drain-Source Breakdown Voltage V(BR)DSS (25C)
Transient Thermal Impedance Zth(ch-c) (C/W)
Drain-Source Breakdown Voltage V(BR)DSS (tC)
Breakdown Voltage vs. Channel Temperature (Typical)
1.4
Transient Thermal Impedance Characteristics
101 7 5 3 2 100 D = 1.0 7 5 0.5 3 0.2 2
0.1
VGS = 0V ID = 1mA
1.2
1.0
0.8
PDM
tw
10-1 7 5 3 2
0.05 0.02 0.01 Single Pulse
T D= tw T
0.6
0.4
-50
0
50
100
150
10-2 -4 10 2 3 5710-3 2 3 5710-22 3 5710-12 3 57100 2 3 57101 2 3 57102
Channel Temperature Tch (C)
Pulse Width tw (s)
Switching Time Measurement Circuit
Vin Monitor D.U.T. RL Vin Vout RGS VDD Vout Monitor
Switching Waveform
90%
RGEN
10% 10% 10%
90% td(on) tr
90% td(off) tf
Rev.2.00
Aug 07, 2006
page 5 of 6
FS50SM-3
Package Dimensions
Package Name TO-3P* JEITA Package Code SC-65 RENESAS Code PRSS0004ZB-A Previous Code MASS[Typ.] 4.8g
Unit: mm
15.9Max
4.5 1.5
5.0 3.2 2
2
4
20.0
4.4
1.0
19.5Min
0.6 5.45 5.45
2.8
4
Order Code
Lead form Standard packing Quantity Standard order code Standard order code example FS50SM-3 FS50SM-3-A8
Straight type Static electricity prevention bag 20 Type name Lead form Plastic Magazine (Tube) 30 Type name - Lead forming code Note : Please confirm the specification about the shipping in detail.
Rev.2.00
Aug 07, 2006
page 6 of 6
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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Colophon .6.0

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